- 03 Aug, 2012 12 commits
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Ronald S. Bultje authored
For left HFYU prediction, we predict from the buffer buf+1 using 8- or 16-byte reads. This means that aligning the buffer by 16 bytes is in itself not sufficient, because if the width itself is 16- or 8-byte aligned, the buffer will not be padded, and thus a read of size 16 at buf+1 will overflow boundaries at the right edge. Padding the buffer by 1 byte is sufficient to not overflow its boundaries. Fixes bug 342.
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Ronald S. Bultje authored
This makes add_hfyu_left_prediction_sse4() handle sources that are not 16-byte aligned in its own function rather than by proxying the call to add_hfyu_left_prediction_ssse3(). This fixes a crash on Win64, since the sse4 version clobberes xmm6, but the ssse3 version (which uses MMX regs) does not restore it, thus leading to XMM clobbering and RSP being off. Fixes bug 342.
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Mashiat Sarker Shakkhar authored
The scaling process for obtaining direct MVs from co-located field MVs is the same for interlaced field and progressive pictures. Signed-off-by: Kostya Shishkov <kostya.shishkov@gmail.com>
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Mashiat Sarker Shakkhar authored
In VC-1 interlaced field pictures, chroma motion vectors can extend beyond picture boundary even if luma vectors are bounded. The problem shows up only for hpel interpolated MVs, and may be due to the way motion vectors are scaled / cropped. Thanks to Konstantin Shishkov for suggesting the fix. This fixes long-known segfaults in MC-VC1.ts from videolan streams archive. Signed-off-by: Kostya Shishkov <kostya.shishkov@gmail.com>
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Diego Biurrun authored
Currently there is a wild mix of 3dn2/3dnow2/3dnowext. Switching to "3dnowext", which is a more common name of the CPU flag, as reported e.g. by the Linux kernel, unifies this.
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Kostya Shishkov authored
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Kostya Shishkov authored
Fixed codebook mode in 5300 rate may write up to SUBFRAME_LEN + 4 and that is considered normal by the reference decoder. Without that additional padding it might overwrite first elements of LPC history.
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Kostya Shishkov authored
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Kostya Shishkov authored
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Kostya Shishkov authored
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Kostya Shishkov authored
The same buffer with saved data is used later in LPC reconstruction, so it should have some head space for LPC history.
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Sean McGovern authored
This fixes Bugzilla #327: Signed-off-by: Kostya Shishkov <kostya.shishkov@gmail.com>
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- 02 Aug, 2012 12 commits
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Diego Biurrun authored
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Diego Biurrun authored
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Derek Buitenhuis authored
Signed-off-by: Derek Buitenhuis <derek.buitenhuis@gmail.com>
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Ronald S. Bultje authored
Some calculations were changed in b6a3849a to use mmsize, which was not correct for the AVX version, which uses INIT_YMM and therefore has mmsize == 32. Fixes Bug 341. Signed-off-by: Justin Ruggles <justin.ruggles@gmail.com>
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Alex Rønne Petersen authored
Signed-off-by: Derek Buitenhuis <derek.buitenhuis@gmail.com>
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Jordi Ortiz authored
Signed-off-by: Luca Barbato <lu_zero@gentoo.org>
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Mans Rullgard authored
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Mans Rullgard authored
This allows building dct-test even if aandcttab.o is not pulled in by any enabled codec. The DCT with which these tables are used does not use them directly, so building it without the tables is possible. Signed-off-by: Mans Rullgard <mans@mansr.com>
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Mans Rullgard authored
Reordering the members in this struct reduces the holes required to maintain alignment. With this order, the only remaining, and unavoidable, hole is 3 bytes following left_nnz. Signed-off-by: Mans Rullgard <mans@mansr.com>
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Mans Rullgard authored
These functions are not faster than other mmx implementations on any hardware I have been able to test on, and they are horribly inaccurate. There is thus no reason to ever use them. Signed-off-by: Mans Rullgard <mans@mansr.com>
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Derek Buitenhuis authored
Signed-off-by: Derek Buitenhuis <derek.buitenhuis@gmail.com>
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Derek Buitenhuis authored
At the moment it only does BGR24, but I plan to add the rest after. Signed-off-by: Derek Buitenhuis <derek.buitenhuis@gmail.com>
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- 01 Aug, 2012 6 commits
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Diego Biurrun authored
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Mans Rullgard authored
Signed-off-by: Mans Rullgard <mans@mansr.com>
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Mans Rullgard authored
The standard syntax requires two destination registers for LDRD/STRD instructions. Some versions of the GNU assembler allow using only one with the second implicit, others are more strict. Signed-off-by: Mans Rullgard <mans@mansr.com>
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Ronald S. Bultje authored
64-bit CPUs always have SSE available, thus there is no need to compile in the 3dnow functions. This results in smaller binaries.
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Ronald S. Bultje authored
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Ronald S. Bultje authored
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- 31 Jul, 2012 10 commits
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Diego Biurrun authored
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Diego Biurrun authored
This will allow adding dca.c with tables used from other files.
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Diego Biurrun authored
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Anton Khirnov authored
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Anton Khirnov authored
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Anton Khirnov authored
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Anton Khirnov authored
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Samuel Pitoiset authored
They are managed in get_packet() Signed-off-by: Luca Barbato <lu_zero@gentoo.org>
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Diego Biurrun authored
This fixes compilation with YASM disabled.
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Diego Biurrun authored
The yadif mmx optimizations contain the pmaxsw and pmaxub mmxext instructions, causing sigills on CPUs that do not support mmxext.
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