Commit dbb37e77 authored by Diego Biurrun's avatar Diego Biurrun

x86: PABSW: port to cpuflags

parent 6c104826
...@@ -268,7 +268,6 @@ cglobal vc1_h_loop_filter8, 3,5,0 ...@@ -268,7 +268,6 @@ cglobal vc1_h_loop_filter8, 3,5,0
%endmacro %endmacro
INIT_MMX mmxext INIT_MMX mmxext
%define PABSW PABSW_MMXEXT
VC1_LF VC1_LF
INIT_XMM sse2 INIT_XMM sse2
...@@ -284,8 +283,6 @@ cglobal vc1_h_loop_filter8, 3,6,8 ...@@ -284,8 +283,6 @@ cglobal vc1_h_loop_filter8, 3,6,8
VC1_H_LOOP_FILTER 8, r5 VC1_H_LOOP_FILTER 8, r5
RET RET
%define PABSW PABSW_SSSE3
INIT_MMX ssse3 INIT_MMX ssse3
; void ff_vc1_v_loop_filter4_ssse3(uint8_t *src, int stride, int pq) ; void ff_vc1_v_loop_filter4_ssse3(uint8_t *src, int stride, int pq)
cglobal vc1_v_loop_filter4, 3,5,0 cglobal vc1_v_loop_filter4, 3,5,0
......
...@@ -145,13 +145,21 @@ ...@@ -145,13 +145,21 @@
%endif %endif
%endmacro %endmacro
; PABSW macros assume %1 != %2, while ABS1/2 macros work in-place ; PABSW macro assumes %1 != %2, while ABS1/2 macros work in-place
%macro PABSW_MMX 2 %macro PABSW 2
%if cpuflag(ssse3)
pabsw %1, %2
%elif cpuflag(mmxext)
pxor %1, %1
psubw %1, %2
pmaxsw %1, %2
%else
pxor %1, %1 pxor %1, %1
pcmpgtw %1, %2 pcmpgtw %1, %2
pxor %2, %1 pxor %2, %1
psubw %2, %1 psubw %2, %1
SWAP %1, %2 SWAP %1, %2
%endif
%endmacro %endmacro
%macro PSIGNW_MMX 2 %macro PSIGNW_MMX 2
...@@ -159,16 +167,6 @@ ...@@ -159,16 +167,6 @@
psubw %1, %2 psubw %1, %2
%endmacro %endmacro
%macro PABSW_MMXEXT 2
pxor %1, %1
psubw %1, %2
pmaxsw %1, %2
%endmacro
%macro PABSW_SSSE3 2
pabsw %1, %2
%endmacro
%macro PSIGNW_SSSE3 2 %macro PSIGNW_SSSE3 2
psignw %1, %2 psignw %1, %2
%endmacro %endmacro
......
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