Commit b82b49a5 authored by Mans Rullgard's avatar Mans Rullgard

mips: intreadwrite: remove unnecessary inline asm

GCC actually handles unaligned accesses correctly in all cases
except, absurdly, 32-bit loads on mips64.  The remaining asm is
thus not needed, and removing it results in better code.
Signed-off-by: 's avatarMans Rullgard <mans@mansr.com>
parent ac712309
...@@ -24,7 +24,7 @@ ...@@ -24,7 +24,7 @@
#include <stdint.h> #include <stdint.h>
#include "config.h" #include "config.h"
#if HAVE_INLINE_ASM #if ARCH_MIPS64 && HAVE_INLINE_ASM
#define AV_RN32 AV_RN32 #define AV_RN32 AV_RN32
static av_always_inline uint32_t AV_RN32(const void *p) static av_always_inline uint32_t AV_RN32(const void *p)
...@@ -38,61 +38,6 @@ static av_always_inline uint32_t AV_RN32(const void *p) ...@@ -38,61 +38,6 @@ static av_always_inline uint32_t AV_RN32(const void *p)
return v; return v;
} }
#define AV_WN32 AV_WN32 #endif /* ARCH_MIPS64 && HAVE_INLINE_ASM */
static av_always_inline void AV_WN32(void *p, uint32_t v)
{
__asm__ ("swl %2, %0 \n\t"
"swr %2, %1 \n\t"
: "=m"(*(uint32_t *)((uint8_t *)p+3*!HAVE_BIGENDIAN)),
"=m"(*(uint32_t *)((uint8_t *)p+3*HAVE_BIGENDIAN))
: "r"(v));
}
#if ARCH_MIPS64
#define AV_RN64 AV_RN64
static av_always_inline uint64_t AV_RN64(const void *p)
{
uint64_t v;
__asm__ ("ldl %0, %1 \n\t"
"ldr %0, %2 \n\t"
: "=&r"(v)
: "m"(*(const uint64_t *)((const uint8_t *)p+7*!HAVE_BIGENDIAN)),
"m"(*(const uint64_t *)((const uint8_t *)p+7*HAVE_BIGENDIAN)));
return v;
}
#define AV_WN64 AV_WN64
static av_always_inline void AV_WN64(void *p, uint64_t v)
{
__asm__ ("sdl %2, %0 \n\t"
"sdr %2, %1 \n\t"
: "=m"(*(uint64_t *)((uint8_t *)p+7*!HAVE_BIGENDIAN)),
"=m"(*(uint64_t *)((uint8_t *)p+7*HAVE_BIGENDIAN))
: "r"(v));
}
#else
#define AV_RN64 AV_RN64
static av_always_inline uint64_t AV_RN64(const void *p)
{
union { uint64_t v; uint32_t hl[2]; } v;
v.hl[0] = AV_RN32(p);
v.hl[1] = AV_RN32((const uint8_t *)p + 4);
return v.v;
}
#define AV_WN64 AV_WN64
static av_always_inline void AV_WN64(void *p, uint64_t v)
{
union { uint64_t v; uint32_t hl[2]; } vv = { v };
AV_WN32(p, vv.hl[0]);
AV_WN32((uint8_t *)p + 4, vv.hl[1]);
}
#endif /* ARCH_MIPS64 */
#endif /* HAVE_INLINE_ASM */
#endif /* AVUTIL_MIPS_INTREADWRITE_H */ #endif /* AVUTIL_MIPS_INTREADWRITE_H */
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment