Commit a3f30f2e authored by Michael Niedermayer's avatar Michael Niedermayer

Merge commit '5ae72f54'

* commit '5ae72f54':
  flashsv: check for keyframe before using differential coding
  h264: enable low delay only if no delayed frames were seen
  x86: fix build without inline asm

Conflicts:
	libavcodec/h264.c
Merged-by: 's avatarMichael Niedermayer <michaelni@gmx.at>
parents 59b68ee8 5ae72f54
......@@ -379,6 +379,11 @@ static int flashsv_decode_frame(AVCodecContext *avctx, void *data,
}
if (has_diff) {
if (!s->keyframe) {
av_log(avctx, AV_LOG_ERROR,
"inter frame without keyframe\n");
return AVERROR_INVALIDDATA;
}
s->diff_start = get_bits(&gb, 8);
s->diff_height = get_bits(&gb, 8);
av_log(avctx, AV_LOG_DEBUG,
......@@ -405,10 +410,6 @@ static int flashsv_decode_frame(AVCodecContext *avctx, void *data,
int k;
int off = (s->image_height - y_pos - 1) * s->frame.linesize[0];
if (!s->keyframe) {
av_log(avctx, AV_LOG_ERROR, "no keyframe yet\n");
return AVERROR_INVALIDDATA;
}
for (k = 0; k < cur_blk_height; k++)
memcpy(s->frame.data[0] + off - k*s->frame.linesize[0] + x_pos*3,
s->keyframe + off - k*s->frame.linesize[0] + x_pos*3,
......
......@@ -4007,8 +4007,15 @@ again:
if (s->flags & CODEC_FLAG_LOW_DELAY ||
(h->sps.bitstream_restriction_flag &&
!h->sps.num_reorder_frames))
s->low_delay = 1;
!h->sps.num_reorder_frames)) {
if (s->avctx->has_b_frames > 1 || h->delayed_pic[0])
av_log(avctx, AV_LOG_WARNING, "Delayed frames seen "
"reenabling low delay requires a codec "
"flush.\n");
else
s->low_delay = 1;
}
if (avctx->has_b_frames < 2)
avctx->has_b_frames = !s->low_delay;
break;
......
......@@ -2431,6 +2431,18 @@ static void dsputil_init_mmxext(DSPContext *c, AVCodecContext *avctx,
#if HAVE_INLINE_ASM
c->prefetch = prefetch_mmxext;
SET_QPEL_FUNCS(avg_qpel, 0, 16, mmxext, );
SET_QPEL_FUNCS(avg_qpel, 1, 8, mmxext, );
SET_QPEL_FUNCS(avg_2tap_qpel, 0, 16, mmxext, );
SET_QPEL_FUNCS(avg_2tap_qpel, 1, 8, mmxext, );
SET_QPEL_FUNCS(put_qpel, 0, 16, mmxext, );
SET_QPEL_FUNCS(put_qpel, 1, 8, mmxext, );
SET_QPEL_FUNCS(put_2tap_qpel, 0, 16, mmxext, );
SET_QPEL_FUNCS(put_2tap_qpel, 1, 8, mmxext, );
SET_QPEL_FUNCS(put_no_rnd_qpel, 0, 16, mmxext, );
SET_QPEL_FUNCS(put_no_rnd_qpel, 1, 8, mmxext, );
if (!high_bit_depth) {
c->put_pixels_tab[0][1] = put_pixels16_x2_mmxext;
c->put_pixels_tab[0][2] = put_pixels16_y2_mmxext;
......@@ -2468,13 +2480,6 @@ static void dsputil_init_mmxext(DSPContext *c, AVCodecContext *avctx,
#if HAVE_MMXEXT_EXTERNAL
if (CONFIG_H264QPEL) {
SET_QPEL_FUNCS(put_qpel, 0, 16, mmxext, );
SET_QPEL_FUNCS(put_qpel, 1, 8, mmxext, );
SET_QPEL_FUNCS(put_no_rnd_qpel, 0, 16, mmxext, );
SET_QPEL_FUNCS(put_no_rnd_qpel, 1, 8, mmxext, );
SET_QPEL_FUNCS(avg_qpel, 0, 16, mmxext, );
SET_QPEL_FUNCS(avg_qpel, 1, 8, mmxext, );
if (!high_bit_depth) {
SET_QPEL_FUNCS(put_h264_qpel, 0, 16, mmxext, );
SET_QPEL_FUNCS(put_h264_qpel, 1, 8, mmxext, );
......@@ -2492,11 +2497,6 @@ static void dsputil_init_mmxext(DSPContext *c, AVCodecContext *avctx,
SET_QPEL_FUNCS(put_h264_qpel, 2, 4, 10_mmxext, ff_);
SET_QPEL_FUNCS(avg_h264_qpel, 2, 4, 10_mmxext, ff_);
}
SET_QPEL_FUNCS(put_2tap_qpel, 0, 16, mmxext, );
SET_QPEL_FUNCS(put_2tap_qpel, 1, 8, mmxext, );
SET_QPEL_FUNCS(avg_2tap_qpel, 0, 16, mmxext, );
SET_QPEL_FUNCS(avg_2tap_qpel, 1, 8, mmxext, );
}
if (!high_bit_depth && CONFIG_H264CHROMA) {
......@@ -2626,10 +2626,19 @@ static void dsputil_init_sse(DSPContext *c, AVCodecContext *avctx, int mm_flags)
static void dsputil_init_sse2(DSPContext *c, AVCodecContext *avctx,
int mm_flags)
{
#if HAVE_SSE2_EXTERNAL
const int bit_depth = avctx->bits_per_raw_sample;
const int high_bit_depth = bit_depth > 8;
#if HAVE_SSE2_INLINE
if (!high_bit_depth && avctx->idct_algo == FF_IDCT_XVIDMMX) {
c->idct_put = ff_idct_xvid_sse2_put;
c->idct_add = ff_idct_xvid_sse2_add;
c->idct = ff_idct_xvid_sse2;
c->idct_permutation_type = FF_SSE2_IDCT_PERM;
}
#endif /* HAVE_SSE2_INLINE */
#if HAVE_SSE2_EXTERNAL
if (!(mm_flags & AV_CPU_FLAG_SSE2SLOW)) {
// these functions are slower than mmx on AMD, but faster on Intel
if (!high_bit_depth) {
......
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