Commit 8563f988 authored by Janne Grunau's avatar Janne Grunau

x86: use emms after ff_int32_to_float_fmul_scalar_sse

Intel's Instruction Set Reference (as of September 2015) clearly states
that cvtpi2ps switches to MMX state. Actual CPUs do not switch if the
source is a memory location. The Instruction Set Reference from 1999
(Order Number 243191) describes this behaviour but all later versions
I've seen have make no distinction whether MMX registers or memory is
used as source.
The documentation for the matching SSE2 instruction to convert to double
(cvtpi2pd) was fixed (see the valgrind bug
https://bugs.kde.org/show_bug.cgi?id=210264).

It will take time to get a clarification and fixes in place. In the
meantime it makes sense to change ff_int32_to_float_fmul_scalar_sse to
be correct according to the documentation. The vast majority of users
will have SSE2 so a change to the SSE version has little effect.

Fixes fate-checkasm on x86 valgrind targets.

Valgrind 'bug' reported as https://bugs.kde.org/show_bug.cgi?id=357059
parent f0f54117
...@@ -61,7 +61,14 @@ cglobal int32_to_float_fmul_scalar, 4, 4, %1, dst, src, mul, len ...@@ -61,7 +61,14 @@ cglobal int32_to_float_fmul_scalar, 4, 4, %1, dst, src, mul, len
mova [dstq+lenq+16], m2 mova [dstq+lenq+16], m2
add lenq, 32 add lenq, 32
jl .loop jl .loop
REP_RET %if notcpuflag(sse2)
;; cvtpi2ps switches to MMX even if the source is a memory location
;; possible an error in documentation since every tested CPU disagrees with
;; that. Use emms anyway since the vast majority of machines will use the
;; SSE2 variant
emms
%endif
RET
%endmacro %endmacro
INIT_XMM sse INIT_XMM sse
......
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