Commit 7d73d1c3 authored by Ramiro Polla's avatar Ramiro Polla

Indent.

Originally committed as revision 29654 to svn://svn.mplayerhq.hu/mplayer/trunk/libswscale
parent b126dee9
...@@ -274,16 +274,16 @@ void rgb32to24(const uint8_t *src, uint8_t *dst, long src_size) ...@@ -274,16 +274,16 @@ void rgb32to24(const uint8_t *src, uint8_t *dst, long src_size)
long i; long i;
long num_pixels = src_size >> 2; long num_pixels = src_size >> 2;
for (i=0; i<num_pixels; i++) { for (i=0; i<num_pixels; i++) {
#if HAVE_BIGENDIAN #if HAVE_BIGENDIAN
/* RGB32 (= A,B,G,R) -> BGR24 (= B,G,R) */ /* RGB32 (= A,B,G,R) -> BGR24 (= B,G,R) */
dst[3*i + 0] = src[4*i + 1]; dst[3*i + 0] = src[4*i + 1];
dst[3*i + 1] = src[4*i + 2]; dst[3*i + 1] = src[4*i + 2];
dst[3*i + 2] = src[4*i + 3]; dst[3*i + 2] = src[4*i + 3];
#else #else
dst[3*i + 0] = src[4*i + 2]; dst[3*i + 0] = src[4*i + 2];
dst[3*i + 1] = src[4*i + 1]; dst[3*i + 1] = src[4*i + 1];
dst[3*i + 2] = src[4*i + 0]; dst[3*i + 2] = src[4*i + 0];
#endif #endif
} }
} }
...@@ -291,18 +291,18 @@ void rgb24to32(const uint8_t *src, uint8_t *dst, long src_size) ...@@ -291,18 +291,18 @@ void rgb24to32(const uint8_t *src, uint8_t *dst, long src_size)
{ {
long i; long i;
for (i=0; 3*i<src_size; i++) { for (i=0; 3*i<src_size; i++) {
#if HAVE_BIGENDIAN #if HAVE_BIGENDIAN
/* RGB24 (= R,G,B) -> BGR32 (= A,R,G,B) */ /* RGB24 (= R,G,B) -> BGR32 (= A,R,G,B) */
dst[4*i + 0] = 255; dst[4*i + 0] = 255;
dst[4*i + 1] = src[3*i + 0]; dst[4*i + 1] = src[3*i + 0];
dst[4*i + 2] = src[3*i + 1]; dst[4*i + 2] = src[3*i + 1];
dst[4*i + 3] = src[3*i + 2]; dst[4*i + 3] = src[3*i + 2];
#else #else
dst[4*i + 0] = src[3*i + 2]; dst[4*i + 0] = src[3*i + 2];
dst[4*i + 1] = src[3*i + 1]; dst[4*i + 1] = src[3*i + 1];
dst[4*i + 2] = src[3*i + 0]; dst[4*i + 2] = src[3*i + 0];
dst[4*i + 3] = 255; dst[4*i + 3] = 255;
#endif #endif
} }
} }
...@@ -315,17 +315,17 @@ void rgb16tobgr32(const uint8_t *src, uint8_t *dst, long src_size) ...@@ -315,17 +315,17 @@ void rgb16tobgr32(const uint8_t *src, uint8_t *dst, long src_size)
while (s < end) { while (s < end) {
register uint16_t bgr; register uint16_t bgr;
bgr = *s++; bgr = *s++;
#if HAVE_BIGENDIAN #if HAVE_BIGENDIAN
*d++ = 255; *d++ = 255;
*d++ = (bgr&0x1F)<<3; *d++ = (bgr&0x1F)<<3;
*d++ = (bgr&0x7E0)>>3; *d++ = (bgr&0x7E0)>>3;
*d++ = (bgr&0xF800)>>8; *d++ = (bgr&0xF800)>>8;
#else #else
*d++ = (bgr&0xF800)>>8; *d++ = (bgr&0xF800)>>8;
*d++ = (bgr&0x7E0)>>3; *d++ = (bgr&0x7E0)>>3;
*d++ = (bgr&0x1F)<<3; *d++ = (bgr&0x1F)<<3;
*d++ = 255; *d++ = 255;
#endif #endif
} }
} }
...@@ -375,17 +375,17 @@ void rgb15tobgr32(const uint8_t *src, uint8_t *dst, long src_size) ...@@ -375,17 +375,17 @@ void rgb15tobgr32(const uint8_t *src, uint8_t *dst, long src_size)
while (s < end) { while (s < end) {
register uint16_t bgr; register uint16_t bgr;
bgr = *s++; bgr = *s++;
#if HAVE_BIGENDIAN #if HAVE_BIGENDIAN
*d++ = 255; *d++ = 255;
*d++ = (bgr&0x1F)<<3; *d++ = (bgr&0x1F)<<3;
*d++ = (bgr&0x3E0)>>2; *d++ = (bgr&0x3E0)>>2;
*d++ = (bgr&0x7C00)>>7; *d++ = (bgr&0x7C00)>>7;
#else #else
*d++ = (bgr&0x7C00)>>7; *d++ = (bgr&0x7C00)>>7;
*d++ = (bgr&0x3E0)>>2; *d++ = (bgr&0x3E0)>>2;
*d++ = (bgr&0x1F)<<3; *d++ = (bgr&0x1F)<<3;
*d++ = 255; *d++ = 255;
#endif #endif
} }
} }
......
...@@ -76,11 +76,11 @@ static inline void RENAME(rgb24tobgr32)(const uint8_t *src, uint8_t *dst, long s ...@@ -76,11 +76,11 @@ static inline void RENAME(rgb24tobgr32)(const uint8_t *src, uint8_t *dst, long s
uint8_t *dest = dst; uint8_t *dest = dst;
const uint8_t *s = src; const uint8_t *s = src;
const uint8_t *end; const uint8_t *end;
#if HAVE_MMX #if HAVE_MMX
const uint8_t *mm_end; const uint8_t *mm_end;
#endif #endif
end = s + src_size; end = s + src_size;
#if HAVE_MMX #if HAVE_MMX
__asm__ volatile(PREFETCH" %0"::"m"(*s):"memory"); __asm__ volatile(PREFETCH" %0"::"m"(*s):"memory");
mm_end = end - 23; mm_end = end - 23;
__asm__ volatile("movq %0, %%mm7"::"m"(mask32a):"memory"); __asm__ volatile("movq %0, %%mm7"::"m"(mask32a):"memory");
...@@ -111,21 +111,21 @@ static inline void RENAME(rgb24tobgr32)(const uint8_t *src, uint8_t *dst, long s ...@@ -111,21 +111,21 @@ static inline void RENAME(rgb24tobgr32)(const uint8_t *src, uint8_t *dst, long s
} }
__asm__ volatile(SFENCE:::"memory"); __asm__ volatile(SFENCE:::"memory");
__asm__ volatile(EMMS:::"memory"); __asm__ volatile(EMMS:::"memory");
#endif #endif
while (s < end) { while (s < end) {
#if HAVE_BIGENDIAN #if HAVE_BIGENDIAN
/* RGB24 (= R,G,B) -> RGB32 (= A,B,G,R) */ /* RGB24 (= R,G,B) -> RGB32 (= A,B,G,R) */
*dest++ = 255; *dest++ = 255;
*dest++ = s[2]; *dest++ = s[2];
*dest++ = s[1]; *dest++ = s[1];
*dest++ = s[0]; *dest++ = s[0];
s+=3; s+=3;
#else #else
*dest++ = *s++; *dest++ = *s++;
*dest++ = *s++; *dest++ = *s++;
*dest++ = *s++; *dest++ = *s++;
*dest++ = 255; *dest++ = 255;
#endif #endif
} }
} }
...@@ -1436,7 +1436,7 @@ static inline void RENAME(yuvPlanartoyuy2)(const uint8_t *ysrc, const uint8_t *u ...@@ -1436,7 +1436,7 @@ static inline void RENAME(yuvPlanartoyuy2)(const uint8_t *ysrc, const uint8_t *u
const x86_reg chromWidth= width>>1; const x86_reg chromWidth= width>>1;
for (y=0; y<height; y++) { for (y=0; y<height; y++) {
#if HAVE_MMX #if HAVE_MMX
//FIXME handle 2 lines at once (fewer prefetches, reuse some chroma, but very likely memory-limited anyway) //FIXME handle 2 lines at once (fewer prefetches, reuse some chroma, but very likely memory-limited anyway)
__asm__ volatile( __asm__ volatile(
"xor %%"REG_a", %%"REG_a" \n\t" "xor %%"REG_a", %%"REG_a" \n\t"
ASMALIGN(4) ASMALIGN(4)
...@@ -1586,7 +1586,7 @@ static inline void RENAME(yuvPlanartouyvy)(const uint8_t *ysrc, const uint8_t *u ...@@ -1586,7 +1586,7 @@ static inline void RENAME(yuvPlanartouyvy)(const uint8_t *ysrc, const uint8_t *u
const x86_reg chromWidth= width>>1; const x86_reg chromWidth= width>>1;
for (y=0; y<height; y++) { for (y=0; y<height; y++) {
#if HAVE_MMX #if HAVE_MMX
//FIXME handle 2 lines at once (fewer prefetches, reuse some chroma, but very likely memory-limited anyway) //FIXME handle 2 lines at once (fewer prefetches, reuse some chroma, but very likely memory-limited anyway)
__asm__ volatile( __asm__ volatile(
"xor %%"REG_a", %%"REG_a" \n\t" "xor %%"REG_a", %%"REG_a" \n\t"
ASMALIGN(4) ASMALIGN(4)
......
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