Commit 27af15dc authored by Diego Biurrun's avatar Diego Biurrun

prettyprinting cosmetics

Originally committed as revision 11941 to svn://svn.ffmpeg.org/ffmpeg/trunk
parent ad40b153
......@@ -42,11 +42,11 @@
static av_always_inline uint16_t bswap_16(uint16_t x)
{
#if defined(ARCH_X86)
__asm("rorw $8, %0" :
LEGACY_REGS (x) :
"0" (x));
__asm("rorw $8, %0" :
LEGACY_REGS (x) :
"0" (x));
#elif defined(ARCH_SH4)
__asm__("swap.b %0,%0":"=r"(x):"0"(x));
__asm__("swap.b %0,%0":"=r"(x):"0"(x));
#else
x= (x>>8) | (x<<8);
#endif
......@@ -57,35 +57,33 @@ static av_always_inline uint32_t bswap_32(uint32_t x)
{
#if defined(ARCH_X86)
#if __CPU__ != 386
__asm("bswap %0":
"=r" (x) :
__asm("bswap %0":
"=r" (x) :
#else
__asm("xchgb %b0,%h0\n"
" rorl $16,%0\n"
" xchgb %b0,%h0":
LEGACY_REGS (x) :
__asm("xchgb %b0,%h0\n"
"rorl $16,%0 \n"
"xchgb %b0,%h0":
LEGACY_REGS (x) :
#endif
"0" (x));
"0" (x));
#elif defined(ARCH_SH4)
__asm__(
"swap.b %0,%0\n"
"swap.w %0,%0\n"
"swap.b %0,%0\n"
:"=r"(x):"0"(x));
__asm__("swap.b %0,%0\n"
"swap.w %0,%0\n"
"swap.b %0,%0\n"
:"=r"(x):"0"(x));
#elif defined(ARCH_ARM)
uint32_t t;
__asm__ (
"eor %1, %0, %0, ror #16 \n\t"
"bic %1, %1, #0xFF0000 \n\t"
"mov %0, %0, ror #8 \n\t"
"eor %0, %0, %1, lsr #8 \n\t"
: "+r"(x), "+r"(t));
__asm__ ("eor %1, %0, %0, ror #16 \n\t"
"bic %1, %1, #0xFF0000 \n\t"
"mov %0, %0, ror #8 \n\t"
"eor %0, %0, %1, lsr #8 \n\t"
: "+r"(x), "+r"(t));
#elif defined(ARCH_BFIN)
unsigned tmp;
asm("%1 = %0 >> 8 (V);\n\t"
"%0 = %0 << 8 (V);\n\t"
"%0 = %0 | %1;\n\t"
"%0 = PACK(%0.L, %0.H);\n\t"
asm("%1 = %0 >> 8 (V); \n\t"
"%0 = %0 << 8 (V); \n\t"
"%0 = %0 | %1; \n\t"
"%0 = PACK(%0.L, %0.H); \n\t"
: "+d"(x), "=&d"(tmp));
#else
x= ((x<<8)&0xFF00FF00) | ((x>>8)&0x00FF00FF);
......
......@@ -172,7 +172,7 @@ static inline int mid_pred(int a, int b, int c)
*/
static inline int av_clip(int a, int amin, int amax)
{
if (a < amin) return amin;
if (a < amin) return amin;
else if (a > amax) return amax;
else return a;
}
......@@ -285,20 +285,18 @@ static inline int ff_get_fourcc(const char *s){
#if defined(ARCH_X86_64)
static inline uint64_t read_time(void)
{
uint64_t a, d;
asm volatile( "rdtsc\n\t"
: "=a" (a), "=d" (d)
);
return (d << 32) | (a & 0xffffffff);
uint64_t a, d;
asm volatile("rdtsc\n\t"
: "=a" (a), "=d" (d));
return (d << 32) | (a & 0xffffffff);
}
#elif defined(ARCH_X86_32)
static inline long long read_time(void)
{
long long l;
asm volatile( "rdtsc\n\t"
: "=A" (l)
);
return l;
long long l;
asm volatile("rdtsc\n\t"
: "=A" (l));
return l;
}
#elif ARCH_BFIN
static inline uint64_t read_time(void)
......@@ -345,17 +343,18 @@ uint64_t tstart= AV_READ_TIME();\
#define STOP_TIMER(id) \
tend= AV_READ_TIME();\
{\
static uint64_t tsum=0;\
static int tcount=0;\
static int tskip_count=0;\
if(tcount<2 || tend - tstart < FFMAX(8*tsum/tcount, 2000)){\
tsum+= tend - tstart;\
tcount++;\
}else\
tskip_count++;\
if(((tcount+tskip_count)&(tcount+tskip_count-1))==0){\
av_log(NULL, AV_LOG_DEBUG, "%"PRIu64" dezicycles in %s, %d runs, %d skips\n", tsum*10/tcount, id, tcount, tskip_count);\
}\
static uint64_t tsum=0;\
static int tcount=0;\
static int tskip_count=0;\
if(tcount<2 || tend - tstart < FFMAX(8*tsum/tcount, 2000)){\
tsum+= tend - tstart;\
tcount++;\
}else\
tskip_count++;\
if(((tcount+tskip_count)&(tcount+tskip_count-1))==0){\
av_log(NULL, AV_LOG_DEBUG, "%"PRIu64" dezicycles in %s, %d runs, %d skips\n",\
tsum*10/tcount, id, tcount, tskip_count);\
}\
}
#else
#define START_TIMER
......
......@@ -22,47 +22,47 @@
#define FFMPEG_X86CPU_H
#ifdef ARCH_X86_64
# define REG_a "rax"
# define REG_b "rbx"
# define REG_c "rcx"
# define REG_d "rdx"
# define REG_D "rdi"
# define REG_S "rsi"
# define PTR_SIZE "8"
# define REG_a "rax"
# define REG_b "rbx"
# define REG_c "rcx"
# define REG_d "rdx"
# define REG_D "rdi"
# define REG_S "rsi"
# define PTR_SIZE "8"
# define REG_SP "rsp"
# define REG_BP "rbp"
# define REGBP rbp
# define REGa rax
# define REGb rbx
# define REGc rcx
# define REGSP rsp
# define REG_SP "rsp"
# define REG_BP "rbp"
# define REGBP rbp
# define REGa rax
# define REGb rbx
# define REGc rcx
# define REGSP rsp
#else
# define REG_a "eax"
# define REG_b "ebx"
# define REG_c "ecx"
# define REG_d "edx"
# define REG_D "edi"
# define REG_S "esi"
# define PTR_SIZE "4"
# define REG_a "eax"
# define REG_b "ebx"
# define REG_c "ecx"
# define REG_d "edx"
# define REG_D "edi"
# define REG_S "esi"
# define PTR_SIZE "4"
# define REG_SP "esp"
# define REG_BP "ebp"
# define REGBP ebp
# define REGa eax
# define REGb ebx
# define REGc ecx
# define REGSP esp
# define REG_SP "esp"
# define REG_BP "ebp"
# define REGBP ebp
# define REGa eax
# define REGb ebx
# define REGc ecx
# define REGSP esp
#endif
#if defined(ARCH_X86_64) || (defined(ARCH_X86_32) && defined(HAVE_EBX_AVAILABLE) && defined(HAVE_EBP_AVAILABLE))
# define HAVE_7REGS 1
# define HAVE_7REGS 1
#endif
#if defined(ARCH_X86_64) && defined(PIC)
# define BROKEN_RELOCATIONS 1
# define BROKEN_RELOCATIONS 1
#endif
#endif /* FFMPEG_X86CPU_H */
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