Commit 21aed0ed authored by Diego Biurrun's avatar Diego Biurrun

ppc: remove disabled code

parent 0523dc57
......@@ -627,16 +627,6 @@ void put_pixels16_altivec(uint8_t *block, const uint8_t *pixels, int line_size,
// it's faster than -funroll-loops, but using
// -funroll-loops w/ this is bad - 74 cycles again.
// all this is on a 7450, tuning for the 7450
#if 0
for (i = 0; i < h; i++) {
pixelsv1 = vec_ld(0, pixels);
pixelsv2 = vec_ld(16, pixels);
vec_st(vec_perm(pixelsv1, pixelsv2, perm),
0, block);
pixels+=line_size;
block +=line_size;
}
#else
for (i = 0; i < h; i += 4) {
pixelsv1 = vec_ld( 0, pixels);
pixelsv2 = vec_ld(15, pixels);
......@@ -657,7 +647,6 @@ void put_pixels16_altivec(uint8_t *block, const uint8_t *pixels, int line_size,
pixels+=line_size_4;
block +=line_size_4;
}
#endif
}
/* next one assumes that ((line_size % 16) == 0) */
......
......@@ -48,7 +48,6 @@ static void clear_blocks_dcbz32_ppc(DCTELEM *blocks)
{
register int misal = ((unsigned long)blocks & 0x00000010);
register int i = 0;
#if 1
if (misal) {
((unsigned long*)blocks)[0] = 0L;
((unsigned long*)blocks)[1] = 0L;
......@@ -66,9 +65,6 @@ static void clear_blocks_dcbz32_ppc(DCTELEM *blocks)
((unsigned long*)blocks)[191] = 0L;
i += 16;
}
#else
memset(blocks, 0, sizeof(DCTELEM)*6*64);
#endif
}
/* same as above, when dcbzl clear a whole 128B cache line
......@@ -78,7 +74,6 @@ static void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
{
register int misal = ((unsigned long)blocks & 0x0000007f);
register int i = 0;
#if 1
if (misal) {
// we could probably also optimize this case,
// but there's not much point as the machines
......@@ -89,9 +84,6 @@ static void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
for ( ; i < sizeof(DCTELEM)*6*64 ; i += 128) {
__asm__ volatile("dcbzl %0,%1" : : "b" (blocks), "r" (i) : "memory");
}
#else
memset(blocks, 0, sizeof(DCTELEM)*6*64);
#endif
}
#else
static void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
......
......@@ -265,7 +265,6 @@ void fdct_altivec(int16_t *block)
* conversion to vector float. The following code section takes advantage
* of this.
*/
#if 1
/* fdct rows {{{ */
x0 = ((vector float)vec_add(vs16(b00), vs16(b70)));
x7 = ((vector float)vec_sub(vs16(b00), vs16(b70)));
......@@ -389,29 +388,6 @@ void fdct_altivec(int16_t *block)
b31 = vec_add(b31, x2);
b11 = vec_add(b11, x3);
/* }}} */
#else
/* convert to float {{{ */
#define CTF(n) \
vs32(b##n##1) = vec_unpackl(vs16(b##n##0)); \
vs32(b##n##0) = vec_unpackh(vs16(b##n##0)); \
b##n##1 = vec_ctf(vs32(b##n##1), 0); \
b##n##0 = vec_ctf(vs32(b##n##0), 0); \
CTF(0);
CTF(1);
CTF(2);
CTF(3);
CTF(4);
CTF(5);
CTF(6);
CTF(7);
#undef CTF
/* }}} */
FDCTROW(b00, b10, b20, b30, b40, b50, b60, b70);
FDCTROW(b01, b11, b21, b31, b41, b51, b61, b71);
#endif
/* 8x8 matrix transpose (vector float[8][2]) {{{ */
......
......@@ -515,21 +515,6 @@ static void dct_unquantize_h263_altivec(MpegEncContext *s,
qaddv = vec_splat((vec_s16)vec_lde(0, &qadd8), 0);
nqaddv = vec_sub(vczero, qaddv);
#if 0 // block *is* 16 bytes-aligned, it seems.
// first make sure block[j] is 16 bytes-aligned
for(j = 0; (j <= nCoeffs) && ((((unsigned long)block) + (j << 1)) & 0x0000000F) ; j++) {
level = block[j];
if (level) {
if (level < 0) {
level = level * qmul - qadd;
} else {
level = level * qmul + qadd;
}
block[j] = level;
}
}
#endif
// vectorize all the 16 bytes-aligned blocks
// of 8 elements
for(; (j + 7) <= nCoeffs ; j+=8) {
......@@ -599,9 +584,6 @@ void MPV_common_init_altivec(MpegEncContext *s)
if ((s->avctx->dct_algo == FF_DCT_AUTO) ||
(s->avctx->dct_algo == FF_DCT_ALTIVEC)) {
#if 0 /* seems to cause trouble under some circumstances */
s->dct_quantize = dct_quantize_altivec;
#endif
s->dct_unquantize_h263_intra = dct_unquantize_h263_altivec;
s->dct_unquantize_h263_inter = dct_unquantize_h263_altivec;
}
......
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